Yoeli, Michael, 1917-

Verification of systems and circuits using LOTOS, Petri Nets, and CCS / by Michael Yoeli and Rakefet Kol. - Hoboken, N.J. : Wiley-Interscience, �2008. - 1 online resource (xv, 231 pages) : illustrations - Wiley series on parallel and distributed computing . - Wiley series on parallel and distributed computing. .

Includes bibliographical references and index.

VERIFICATION OF SYSTEMS AND CIRCUITS USING LOTOS, PETRI NETS, AND CCS; CONTENTS; 1. Introduction; 2. Processes; 3. From Digital Hardware to Processes; 4. Introducing LOTOS; 5. Introducing Petri Nets; 6. Introducing CCS; 7. Verification of Modular Asynchronous Circuits; 8. Verification of Communication Protocols; 9. Verification of Arbiters; 10. More Verification Case Studies; 11. Guide to Further Studies; Index.

A Step-by-Step Guide to Verification of Digital Systems. This practical book provides a step-by-step, interactive introduction to formal verification of systems and circuits. The book offers theoretical background and introduces the application of.


English.

9780470253397 0470253398 9780470253410 047025341X 9786611284671 6611284672

10.1002/9780470253410 doi

10.1002/9780470253410 Wiley InterScience http://www3.interscience.wiley.com

2007033487

GBA806238. bnb GBA806238 bnb

Uk Uk


Integrated circuits--Verification.
Computer software--Verification.
LOTOS (Computer program language)
Petri nets.
Computer programs--Verification.
Circuits int�egr�es--V�erification.
Logiciels--V�erification.
LOTOS (Langage de programmation)
R�eseaux de P�etri.
TECHNOLOGY & ENGINEERING--Electronics--Circuits--Integrated.
TECHNOLOGY & ENGINEERING--Electronics--Circuits--General.
Computer programs--Verification
Computer software--Verification
Integrated circuits--Verification
LOTOS (Computer program language)
Petri nets

TK7874.58 / .Y64 2008eb

621.3815/48